[u' @article{solar_fully_2009, title = {A fully integrated 23.2 {dBm} {P}-1 ({dB}) {CMOS} power amplifier for the {IEEE} 802.11 a with 29\\% {PAE}}, volume = {42}, issn = {0167-9260}, doi = {10.1016/j.vlsi.2008.09.005}, abstract = {A two-stage fully integrated power amplifier (PA) for the 802.11a standard is presented. The PA has been fabricated using UMC 0.18 mu m CMOS technology. Measurement results show a power gain of 21.1 dB, a P-1 (dB) of 23.2 dBm and a P-SAT of 26.8 dBm. The PAE is 29\\% and it is kept high by means of several integrated inductors. These inductors present low-DC resistance and high Q characteristics. The inductors must include extra design considerations in order to withstand the high-current levels flowing through them, so that they have been called power inductors. (C) 2008 Elsevier B.V. All rights reserved.}, language = {English}, number = {1}, journal = {Integration-the Vlsi Journal}, author = {Solar, Hector and Berenguer, Roc and de Nob, Joaquin and Gurutzeaga, Inaki and Alvarado, Unai and Legarda, J.}, month = jan, year = {2009}, note = {WOS:000261920100009}, keywords = {CMOs, IEEE 802.11a, IF0.400, Power amplifier, Power inductor, transceiver, wlan}, pages = {77--82} }']